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FDC6308P
July 1999
FDC6308P
Dual P-Channel 2.5V Specified PowerTrenchTM MOSFET
General Description
This P-Channel 2.5V specified MOSFET is a rugged gate version of Fairchild Semiconductor's advanced PowerTrench process. It has been optimized for power management applications with a wide range of gate drive voltage (2.5V - 12V). These devices have been designed to offer exceptional power dissipation in a very small footprint for applications where the bigger more expensive SO-8 and TSSOP-8 packages are impractical.
Features
-1.7 A, -18 V. RDS(ON) = 0.18 @ VGS = -4.5 V RDS(ON) = 0.30 @ VGS = -2.5 V

Extended VGSS range (12V) for battery applications. Low gate charge (3nC typical). Fast switching speed. High performance trench technology for extremely low RDS(ON).
Applications Load switch Battery protection Power management
D2 S1 D1
SuperSOTTM-6 package: small footprint (72% smaller than standard SO-8); low profile (1mm thick).
4
3
5
2
G2
SuperSOT TM -6
S2 G1
TA = 25C unless otherwise noted
6
1
Absolute Maximum Ratings
Symbol
VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed
Parameter
Ratings
-20
(Note 1a)
Units
V V A W
12 -1.7 -5 0.96 0.9 0.7 -55 to +150
Power Dissipation for Single Operation
(Note 1a) (Note 1b) (Note 1c)
TJ, Tstg
Operating and Storage Junction Temperature Range
C
Thermal Characteristics
RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
130 60
C/W C/W
Package Marking and Ordering Information
Device Marking .308 Device
FDC6308P
Reel Size
7''
Tape Width
8mm
Quantity
3000 units
1999 Fairchild Semiconductor Corporation
FDC6308P Rev. C
FDC6308P
Electrical Characteristics
Symbol
BVDSS BVDSS TJ IDSS IGSSF IGSSR
TA = 25C unless otherwise noted
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward
Test Conditions
VGS = 0 V, ID = -250 A ID = -250 A, Referenced to 25C VDS = -16 V, VGS = 0 V VGS = 12 V, VDS = 0 V
Min
-20
Typ
Max Units
V
Off Characteristics
-15 -1 100 -100 mV/C A nA nA
Gate-Body Leakage Current, Reverse VGS = -12 V, VDS = 0 V
(Note 2)
On Characteristics
VGS(th) VGS(th) TJ RDS(on)
Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance On-State Drain Current Forward Transconductance
VDS = VGS, ID = -250 A ID = -250 A, Referenced to 25C VGS = -4.5 V, ID = -1.7 A VGS = -4.5 V, ID = -1.7 A @125C VGS = -2.5 V, ID = -1.4 A VGS = -4.5 V, VDS = -5 V VDS = -5 V, ID = -1.7 A
-0.6
-1.1 2.7 0.143 0.22 0.25
-1.5
V mV/C
0.18 0.28 0.30
ID(on) gFS
-2.5 4
A S
Dynamic Characteristics
Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance
(Note 2)
VDS = -10 V, VGS = 0 V f = 1.0 MHz
265 80 45
pF pF pF
Switching Characteristics
td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge
VDD = -10 V, ID = -1 A VGS = -4.5 V, RGEN = 6
6 9 14 3
12 18 25 9 5
ns ns ns ns nC nC nC
VDS = -10 V, ID = -1.7 A VGS = -4.5 V
3 0.7 0.8
Drain-Source Diode Characteristics and Maximum Ratings
IS VSD Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = -0.8 A
(Note 2)
-0.8 -0.8 -1.2
A V
Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design. Both devices are assumed to be operating and sharing the dissipated heat energy equally.
a) 130 C/W when mounted on a 0.125 in2 pad of 2 oz. copper.
b) 140 C/W when mounted on a 0.005 in2 pad of 2 oz. copper.
c) 180 C/W when mounted on a minimum pad.
Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width 300 s, Duty Cycle 2.0%
FDC6308P Rev. C
FDC6308P
Typical Characteristics
10 -ID, DRAIN-SOURCE CURRENT (A) VGS = -4.5V 8
2.2 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE
-4.0V -3.5V
2 1.8 VGS = -2.5V 1.6 -3.0V 1.4 1.2 1 0.8 -3.5V -4.0V -4.5V
6
-3.0v
4
-2.5V
2 -2.0V 0 0 1 2 3 4 5 -VDS, DRAIN-SOURCE VOLTAGE (V)
0
2
4
6
8
10
- ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
0.5 RDS(ON), ON-RESISTANCE (OHM)
1.5 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 -50 -25 0 25 50 75 100
o
ID = -1.7A VGS = -4.5V
ID = -0.9A 0.4
0.3 TA = 125oC 0.2
0.1
TA = 25oC
0
125
150
1
2
3
4
5
TJ, JUNCTION TEMPERATURE ( C)
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with Temperature.
10 VDS = -5V -ID, DRAIN CURRENT (A) 8 25 C 125 C 6
o o
Figure 4. On-Resistance Variation with Gate-to-Source Voltage.
10 -IS, REVERSE DRAIN CURRENT (A)
TA = -55 C
o
VGS=0 1 TJ=125oC 25oC -55oC 0.01
0.1
4
2
0.001
0 0.5 1.5 2.5 3.5 4.5 5.5
0.0001 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 -VSD, BODY DIODE VOLTAGE (V)
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
FDC6308P Rev. C
FDC6308P
Typical Characteristics
5 -VGS, GATE-SOURCE VOLTAGE (V) ID = -1.7A 4
(continued)
400
VDS = 5V 10V 15V
CAPACITANCE (pF) 300 CISS
f = 1MHz VGS = 0 V
3
200
2
100
1
COSS CRSS
0 0 0.5 1 1.5 2 2.5 3 3.5 4 Qg, GATE CHARGE (nC)
0 0 4 8 12 16 -VDS, DRAIN TO SOURCE VOLTAGE (V) 20
Figure 7. Gate-Charge Characteristics.
100
Figure 8. Capacitance Characteristics.
5
-ID, DRAIN CURRENT (A)
10 RDS(ON) LIMIT
4
100s 1ms 10ms 100ms 1s DC
SINGLE PULSE R JA =180C/W TA = 25C
POWER (W)
3
1 VGS = 4.5V SINGLE PULSE o RJA = 180 C/W TA = 25 C 0.01 0.1 1
o
2
0.1
1
10
100
0 0.01
0.1
-VDS, DRAIN-SOURCE VOLTAGE (V)
1 10 SINGLE PULSE TIME (SEC)
100
300
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power Dissipation.
1 TRANSIENT THERMAL RESISTANCE 0.5
D = 0.5
r(t), NORMALIZED EFFECTIVE
0.2 0.1 0.05
0.2 0.1 0.05 0.02 0.01
R JA (t) = r(t) * R JA R JA =180C/W
P(pk)
t1
t2
0.02 0.01 0.0001
Single Pulse
TJ - T A = P * R JA (t) Duty Cycle, D = t 1 / t 2
0.001
0.01
0.1 t 1 , TIME (sec)
1
10
100
300
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c. Transient themal response will change depending on the circuit board design.
FDC6308P Rev. C
SuperSOTTM-6 Tape and Reel Data and Package Dimensions
SSOT-6 Packaging Configuration: Figur e 1.0
Packaging Description:
Customize Label
Anti static Cover Tape
SSOT-6 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 3,000 units per 7" or 177cm diameter reel. The reels are dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 10,000 units per 13" or 330cm diameter reel. This and some other options are described in the Packaging Information table. These full reels are individually barcode labeled and placed inside a pizza box (illustrated in figure 1.0) made of recyclable corrugated brown paper with a Fairchild logo printing. One pizza box contains three reels maximum. And these pizza boxes are placed inside a barcode labeled shipping box which comes in different sizes depending on the number of parts shipped.
F63TNR Label
Embossed Carrier Tape
631 631
SSOT-6 Packaging Information Packaging Option Packaging type Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg) Note/Comments Standard
(no f l ow c ode )
631
631
631
Pin 1
D87Z TNR 10,000 13" 343x343x64 30,000 0.0158 0.4700
TNR 3,000 7" Dia 184x187x47 9,000 0.0158 0.1440
SSOT-6 Unit Orientation
343mm x 342mm x 64mm Intermediate box fo r D87Z Option
F63TNR Label
F63TNR Label
F63TNR Label sa mpl e 184mm x 187mm x 47mm Pizza Box fo r Standar d Opti on F63TNR Label
LOT: CBVK741B019 FSID: FDC633N QTY: 3000 SPEC:
SSOT-6 Tape Leader and Trailer Configuration: Figur e 2.0
D/C1: D9842 D/C2:
QTY1: QTY2:
SPEC REV: CPN: N/F: F
(F63TNR)3
Carrier Tape Cover Tape
Comp onent s Traile r Tape 300mm mi nimum or 75 empty poc kets Lead er Tape 500mm mi nimum or 125 emp ty poc kets
1998 Fairchild Semiconductor Corporation
August 1999, Rev. C
SuperSOTTM-6 Tape and Reel Data and Package Dimensions, continued
SSOT-6 Embossed Carrier Tape Configuration: Figure 3.0
T E1
P0
D0
F K0 Wc B0 E2 W
Tc A0 P1 D1
User Direction of Feed
Dimensions are in millimeter Pkg type SSOT-6 (8mm)
A0
3.23 +/-0.10
B0
3.18 +/-0.10
W
8.0 +/-0.3
D0
1.55 +/-0.05
D1
1.125 +/-0.125
E1
1.75 +/-0.10
E2
6.25 min
F
3.50 +/-0.05
P1
4.0 +/-0.1
P0
4.0 +/-0.1
K0
1.37 +/-0.10
T
0.255 +/-0.150
Wc
5.2 +/-0.3
Tc
0.06 +/-0.02
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481 rotational and lateral movement requirements (see sketches A, B, and C).
20 deg maximum Typical component cavity center line
0.5mm maximum
B0 20 deg maximum component rotation
0.5mm maximum
Sketch A (Side or Front Sectional View)
Component Rotation
A0 Sketch B (Top View)
Typical component center line
Sketch C (Top View)
Component lateral movement
SSOT-6 Reel Configuration: Figure 4.0
Component Rotation
W1 Measured at Hub
Dim A Max
Dim A max
Dim N
See detail AA
7" Diameter Option
B Min Dim C See detail AA W3
Dim D min
13" Diameter Option
W2 max Measured at Hub DETAIL AA
Dimensions are in inches and millimeters
Tape Size
8mm
Reel Option
7" Dia
Dim A
7.00 177.8 13.00 330
Dim B
0.059 1.5 0.059 1.5
Dim C
512 +0.020/-0.008 13 +0.5/-0.2 512 +0.020/-0.008 13 +0.5/-0.2
Dim D
0.795 20.2 0.795 20.2
Dim N
2.165 55 4.00 100
Dim W1
0.331 +0.059/-0.000 8.4 +1.5/0 0.331 +0.059/-0.000 8.4 +1.5/0
Dim W2
0.567 14.4 0.567 14.4
Dim W3 (LSL-USL)
0.311 - 0.429 7.9 - 10.9 0.311 - 0.429 7.9 - 10.9
8mm
13" Dia
July 1999, Rev. C
SuperSOTTM-6 Tape and Reel Data and Package Dimensions, continued
SuperSOT -6 (FS PKG Code 31, 33)
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in: inches [millimeters]
Part Weight per unit (gram): 0.0158
1998 Fairchild Semiconductor Corporation
September 1998, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM BottomlessTM CoolFETTM CROSSVOLTTM E2CMOSTM FACTTM FACT Quiet SeriesTM FAST FASTrTM GTOTM
DISCLAIMER
HiSeCTM ISOPLANARTM MICROWIRETM POPTM PowerTrench QFETTM QSTM Quiet SeriesTM SuperSOTTM-3 SuperSOTTM-6
SuperSOTTM-8 SyncFETTM TinyLogicTM UHCTM VCXTM
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. E

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